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Hardware Intelligence makes chip design tools that cut simulation and debugging time by an order of magnitude. When a chip test fails, engineers need a recording of every internal signal - a waveform. We’ve developed WaveZip, which captures waveforms 500x smaller with 200x less overhead, and Wave, which beats frontier models on industry chip debugging benchmarks. We’re Rishov Sarkar (Georgia Tech Ph.D. in chip simulation) and Athreya Anand (ex-Google, M.S. ML/AI), YC S26. https://hardwareintelligence.ai
Previously Viki, hi, Hardware Intelligence
Co-founder & CEO of Hardware Intelligence. Athreya was a tech lead at Google where he led AI efforts across orgs from agentic workflow management tools to prediction models for Google Ventures. He has a Master's from Georgia Tech in Machine Learning and A.I., with technical expertise in agentic tools and chip design through his time at Google, AWS Inferentia, and Tesla.
Co-founder & CTO at Hardware Intelligence. Rishov graduated with his PhD in Electrical & Computer Engineering from Georgia Tech with six published first-author/co-first-author conference papers, including one best paper runner-up. He also developed simulators for AMD's AI Engine accelerator and worked on LLVM-based compilation flows at Siemens EDA. He earned his MS and BS in Computer Engineering from Georgia Tech.
Founded 2026 · Source
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Maturity is an evidence-based assessment, not a success rating. It may understate the current stage where evidence is limited. Coverage records documented areas, not a complete or independently audited company history.
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